Fabrication method and structure of semiconductor

专利名称：Fabrication method and structure of

semiconductor non-volatile memory device

发明人：Digh Hisamoto,Shinichiro Kimura,Kan

Yasui,Nozomu Matsuzaki

申请号：US15067444申请日：20160311公开号：US09412750B2公开日：20160809

专利附图：

摘要：A non-volatile semiconductor memory device with good write/erasecharacteristics is provided. A selection gate is formed on a p-type well of a

semiconductor substrate via a gate insulator, and a memory gate is formed on the p-typewell via a laminated film composed of a silicon oxide film, a silicon nitride film, and asilicon oxide film. The memory gate is adjacent to the selection gate via the laminatedfilm. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed.The region controlled by the selection gate and the region controlled by the memorygate located in the channel region between said impurity diffusion layers have thedifferent charge densities of the impurity from each other.

申请人：RENESAS ELECTRONICS CORPORATION

地址：Tokyo JP

国籍：JP

代理机构：Roberts Mlotkowski Safran, Cole & Calderon, P.C.

代理人：Gregory E. Montone

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